日志

Clock Tree Pins

已有 3519 次阅读| 2015-5-5 15:59 |个人分类:原理

CTS的全称是Clock Tree Synthesis，其目的是尽可能的使同一个时钟信号到达各个终端节点的时间相同。

CTS的实现办法最常见的是通过在时钟信号的各个分支上插入buffer或者inverter来balance时钟信号的延迟。

Nonstop pins are pins that would normally be considered endpoints of the clock tree, but instead IC Compiler traces through them to find the clock tree endpoints. The clock pins of sequential cells driving generated clocks are implicit nonstop pins. In addition, IC Compiler supports user-defined (or explicit) nonstop pins.

To specify a nonstop pin, use the set_clock_tree_exceptions -non_stop_pins

Exclude pins are clock tree endpoints that are excluded from clock tree timing calculations and optimizations. IC Compiler uses exclude pins only in calculations and optimizations for design rule constraints. In addition to the exclude pins inferred by IC Compiler (the implicit exclude pins), IC Compiler supports user-defined (or explicit) exclude pins. For example, you might define an exclude pin to exclude all branches of the clock tree that fan out from some combinational logic or to exclude an implicit stop pin.

During clock tree synthesis, IC Compiler isolates exclude pins (both implicit and explicit) from the clock tree by inserting a guide buffer before the pin. Beyond the exclude pin, IC Compiler never performs skew or insertion delay optimization, but does perform. design rule fixing.

To specify an exclude pin, use the set_clock_tree_exceptions -exclude_pins command.

Float pins are clock pins that have special insertion delay requirements. IC Compiler adds the float pin delay (positive or negative) to the calculated insertion delay up to this pin.

Stop pins are the endpoints of the clock tree that are used for delay balancing. During clock tree synthesis, IC Compiler uses stop pins in calculations and optimizations for both design rule constraints and clock tree timing (skew and insertion delay).

The default clock sinks are implicit stop pins. In addition, IC Compiler supports user-defined (or explicit) stop pins. For example, you might define a stop pin to end a branch at an input to a combinational cell or to use an implicit exclude pin as a clock sink.

IC Compiler assigns a phase delay of zero to all stop pins (implicit and explicit) and uses this delay during delay balancing.

To specify a stop pin, use the set_clock_tree_exceptions -stop_pins command

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近日使用IC Compiler过程中，在做CTS时，发现有一个register的clock pin既是ignore pin又是non-stop pin。

如果是ignore pin，则意味着CTS时应把这个sink排除在外；如果是non-stop pin，则意味着要穿过这个sink。而这两种情况是矛盾的。

研究的结果，发现是由于特殊的clock结构造成的。如下图：