日志
book_kit
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1 systemverilog LRM IEEE std 1800
2 systemverilog for verification A guide to learning the testbench language features (2nd/3rd edition)
3 cadence/synopsys sv ppt+lab
4 verilog LRM IEEE std 1364
5 systemverilog 断言及其应用
6 systemverilog assertion handbook
7 sva lab+ppt
二 methdology
1. writing testbenches using systemveriong
2. UVM1.1 应用指南及源代码分析
3. uvm users guide
4. uvm class reference
5. cadence/synopsys/mentor uvm ppt+lab
三 script. language
1. 跟我一起写makefile
2.perl语言编程中文版 ；perl 编程24学时；perl语言入门；大小骆驼
3. tcl编程（脚本手册）；practical programming in Tcl and Tk
4.linux 命令行与shell脚本编程大全；linux命令编程器与shell编程；shell脚本学习指南
四 tools
1. synopsys/candece/mentor usrguide(simualtor,covarage,wave,editor and so on)
五 verifiation introduction
1.verificaion methdology manual
2.writing testbenches functiona verification of HDl models
3软件测试的艺术（测试用来设计方法大全；系统测试用例设计方法）
六 ESL
1. ESL design and verfification
2. ESL models and their application
七 FPGA prototyping
1. FPGA based prototyping methodology manual
八 IC flow
1. IC设计流程
2.ASIC handbook
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