日志
FPGA原型
| |
项目目的
1. 原型：high performance and accuracy
Test real-time dataflow
Early hardware-software integration
Early software valiadation
2. 原型：Interface with the real world
Test real-world data effects
Test real-tome human interface
Debug rare data dependencies
3.原型：in-lab usage
Feasibility(proof of conecpt)
Testing algorithm
4.原型：out-of-lab demonstration
Public exhibitions
Encoverage investors
5. Extended RTL test and debug
/1 
eetop公众号
创芯大讲堂
创芯人才网