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Synopsys Design Ware

已有 3649 次阅读| 2013-10-9 21:49 |个人分类:IC design

IC设计中使用Synopsys DesignWare中提供的Cell往往可以起到减少logic level，优化timing的效果，下面是http://www.synopsys.com/IP/SRAMandLibraries/Pages/default.aspx中对DesignWare Standard Cell Libraries 的评价：

DesignWare Standard Cell Libraries provide high-speed (HS), high-density (HD) and ultra high-density (UHD) architectures to optimize circuits for performance, power and area tradeoffs.

实际设计中常用的Combinational Logic Cell有：

# DW01_binenc:Binary Encoder

# DW01_decode: Decoder

# DW01_mux_any: Universal Multiplexer

# DW01_prienc: Priority Encoder