module top;
parameter width=2; // can modify to any value
time delay1,delay0;
bit[width:0] aa,bb;
inital begin
$display("aa is %b", aa);
aa= 1- cc;
$display("aa is %b", aa);
#10;
$display("delay1 is %t", delay1);
#10;
delay1= $time- delay0;
$display("delay1 is %t", delay1);
end
endmodule
这个模块的仿真结果可以猜一下,我跑的结果竟然是
ncsim >run
aa is 000
aa is 001
delay1 is 0
delay1 is 0
ncsim: *W,RNQUIE: Simulation is complete.
ncsim>exit
如果有人知道为什么请讲解一下