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[Hspice] Verilog-A Model Encryption

已有 3692 次阅读| 2013-8-23 15:27 |个人分类:Hspice

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Question:
Does HSPICE support encryption of Verilog-A modules?

Answer:

Beginning with the E-2010.12-SP2 release, HSPICE can encrypt Verilog-A modules.
The two methods supported are:
   1) 8-Byte encryption
   2) 3DES encryption (private or randkey)
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Question:

Since HSPICE no longer creates a *.cml (compiled Verilog-A) file, how can we share the Verilog-A module and at the same time protect its contents?

Answer:

Verilog-A files can be encrypted using the Metaencrypt utility and then the ecrypted file can be called in the netlist using the .hdl command.

For example:

To encrypt the Verilog-A file, opamp.va, use the command:

% metaencrypt -i opamp.va -o opamp_spi.inc  -t  randkey

The encypted file opamp_spi.inc will be generated. This file can be included in the netlist using the .HDL command.

**opamp.sp
.HDL opamp_spi.inc

Using this method, the contents of the Verilog-A model can be protected and shipped to customers.

For more information, see the Using Verilog-A chapter in the HSPICE User Guide: Advanced Analog Simulation and Analysis and the Library and Data Encryption chapter in the HSPICE User Guide: Basic Simulation and Analysis.

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