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[这个贴子最后由一声叹息在 2004/09/20 10:23am 第 6 次编辑]
Software Defined Radio for 3G:
Contents
Preface
1 What Software Defined Radio Is and Why We Should Use It 1
1.1 Introduction to Software Defined Radio 1
1.2 3G Software Radio Applications 2
1.3 A Traditional Hardware Radio Architecture 3
1.4 An Ideal Software Defined Radio Architecture 4
1.5 Signal Processing Hardware History 5
1.6 Software Defined Radio Project Complexity 7
1.7 The Software Defined Radio Forum 7
1.8 Conclusion 8
References 9
2 A Basic Software Defined Radio Architecture 11
2.1 Introduction 11
2.2 2G Radio Architectures 12
2.2.1 Hybrid Radio Architecture 13
2.3 Basic Software Defined Radio Block Diagram 17
2.4 System-Level Functional Partitioning 21
2.4.1 Digital Frequency Conversion Partitioning 21
2.5 A COTS Implementation of the Basic Architecture 25
2.6 Conclusion 29
References 29
3 RF System Design 31
3.1 Introduction 31
3.2 Worldwide Frequency Band Plans 32
3.3 Noise and Channel Capacity 32
3.4 Link Budget 33
3.4.1 Free Space Loss 34
3.4.2 Practical Loss Models 35
3.4.3 IMT 2000 Path Loss Models 35
3.4.4 Detailed System Link Budget 38
3.5 3G RF Performance Requirements 40
3.5.1 Receiver Requirements 40
3.5.2 3G Transmitter Requirements 42
3.6 Multicarrier Power Amplifiers 43
3.6.1 Power Amplifier Linearizers 43
3.6.2 Power Consumption Efficiency 47
3.7 Signal Processing Capacity Tradeoff 48
3.8 Design Flow 48
3.9 Conclusion 49
References 50
4 Analog-to-Digital and Digital-to-Analog Conversion 51
4.1 Introduction 51
4.2 Digital Conversion Fundamentals 52
4.2.1 Sample Rate 52
4.2.2 Bandpass Sampling 52
4.2.3 Oversampling 54
4.2.4 Antialias Filtering 54
4.2.5 Effective Number of Bits 54
4.2.6 Quantization 55
4.2.7 Static and Dynamic Errors 56
4.3 ADC Techniques 58
4.3.1 Successive Approximation 58
4.3.2 14-Bit Software Radio ADC 59
4.3.3 Dithering 60
4.3.4 Clock Jitter and Aperture Uncertainty 63
4.3.5 Figure of Merit 65
4.4 DACs 66
4.5 Converter Noise and Dynamic Range Budgets 67
4.5.1 DAC Noise Budget 67
4.5.2 ADC Noise Budget 69
4.6 Conclusion 70
References 70
5 Digital Frequency Up- and Downconverters 73
5.1 Introduction 73
5.2 Why Use DUCs and DDCs? 74
5.3 Frequency Converter Fundamentals 74
5.3.1 Digital NCO 75
5.3.2 Digital Mixers 76
5.3.3 Digital Filters 76
5.3.4 Halfband Filters 79
5.3.5 Cascaded Integrator Comb (CIC) Filters 80
5.3.6 Decimation, Interpolation, and Multirate Processing 81
5.4 DUCs 82
5.4.1 ISL5217 82
5.5 DDCs 91
5.5.1 ISL5216 91
5.5.2 ISL5416 93
5.5.3 Cascading Digital Converters and Digital Frequency Converters 95
5.6 Conclusion 95
References 96
6 Signal Processing Hardware Components 97
6.1 Introduction 97
6.2 SDR Requirements for Processing Power 98
6.3 dsps 101
6.3.1 DSP Devices 102
6.3.2 DSP Performance Summary 110
6.3.3 DSP Compilers 111
6.4 Reconfigurable Processors 113
6.4.1 Chameleon Reconfigurable Communications Processor (RCP) 113
6.4.2 Adaptive Computing Machine 119
6.5 FPGAs 120
6.6 Symbol Rate and Chip-Rate Partitioning 122
6.7 Conclusion 122
References 123
7 Software Architecture and Components 125
7.1 Introduction 125
7.2 Major Software Architectural Choices 126
7.2.1 Hardware-Specific Software Architecture 126
7.2.2 Abstracted Open Software Architecture 127
7.3 Software Standards for Software Radio 129
7.3.1 JTRS Software Communications Architecture Specification 130
7.3.2 SDRF Distributed Object Computing Software Radio Architecture 144
7.3.3 The OMG 147
7.3.4 Software Design Patterns 153
7.4 Component Choices 153
7.4.1 Real-Time Operating Systems 153
7.4.2 High-Level Software Languages 156
7.4.3 Hardware Languages 158
7.5 Conclusion 160
References 160
8 Applications for Wireless Systems 163
8.1 Introduction 163
8.2 3G Air Interface Fundamentals 164
8.2.1 CDMA Fundamentals 164
8.2.2 WCDMA 170
8.2.3 CDMA2000 178
8.2.4 GSM Evolution 188
8.3 Software Defined Radio Examples 191
8.3.1 Frameworks and Platforms 191
8.3.2 Base Transceiver Stations 208
8.3.3 3G SDR Testbeds 210
8.4 3G Networks 214
8.4.1 CDMA2000 214
8.4.2 Other 3G Networks 218
8.5 Conclusion 219
References 219
9 Smart Antennas Using Software Radio 221
9.1 Introduction 221
9.2 What Is a Smart Antenna? 221
9.3 3G Smart Antenna Requirements 223
9.4 Phased Antenna Array Theory 223
9.5 Applying Software Radio Principles to Antenna Systems 224
9.6 Smart Antenna Architectures 225
9.6.1 Switched Beam Arrays 226
9.6.2 Optimum Combining/Adaptive Arrays 228
9.6.3 DOA Arrays 229
9.6.4 Beam Forming for CDMA 230
9.6.5 Downlink Beam Forming 232
9.6.6 A Software Radio Smart Antenna Architecture 235
9.7 Smart Antenna Performance 235
9.8 Conclusion 237
References 237
10 Low-Cost Experimental Software Radio Platform 239
10.1 Introduction 239
10.2 Platform Requirements 239
10.3 System Architecture 239
10.4 System Interfaces 242
10.4.1 Analog RF Interface 242
10.4.2 TMS320C62x EVM Daughterboard Interface 242
10.4.3 PCI Interface 242
10.4.4 Line-Level Audio Output Interface 242
10.5 System Design 243
10.5.1 DSP Clock Frequency 243
10.5.2 ADC Clock Source 243
10.5.3 Matching Sampling Rates 244
10.6 Functional Design 245
10.7 Low-Level Implementation Details 248
10.7.1 THS12082 Hardware 248
10.7.2 THS12082 Software 249
10.7.3 DSP BIOS Configuration 249
10.8 Potential Applications and Conclusion 250
References 250
11 Engineering Design Assistance Tools 253
11.1 Introduction 253
11.2 How EDA Tools Can Help Software Radio Development 253
11.3 MATLAB 255
11.3.1 C6701 Developers Kit 255
11.4 Cocentric System Studio 256
11.5 SPW 256
11.6 SystemC 256
11.7 Reference Design Examples 257
11.7.1 CDMA Reference Block Set 257
11.7.2 NIST 257
11.8 Conclusion 259
References 259
List of Acronyms 261
About the Author 267
Index 269 |
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发表于 2004-5-21 23:40:43
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